Area Efficient Wide Frequency Range CMOS Voltage Controlled Oscillator For PLL In 0.18μm CMOS Process

Current starved VCO is simple ring oscillator consisting of cascaded inverters. Differential ring oscillator has a differential output to reject common-mode noise, power supply noise and so on. In this paper we have designed and simulated Current Starved VCO and Differential VCO for PLL in Tanner 13.0v 0.18μm digital CMOS process. Performance comparison is done in terms of high oscillation frequency, low power consumption, and low area. It is observed that maximum oscillation frequency about 2GHz is achieved in three stage differential VCO. But area has been reduced to 688μm 2 with low power consumption of 359.08μW with large tuning range in three stage current starved VCO for a frequency of 1.1GHz at 1.8 VDD.